The present invention relates to semiconductor device manufacturing technology and more particularly to technology which is useful for the Stealth Dicing technology.
The Stealth Dicing technology is a technology whereby the inside of a semiconductor wafer is irradiated with a laser beam to create a modified layer selectively and the semiconductor wafer is cut with the modified layer as the splitting start point. According to this technology, even a very thin semiconductor wafer with a thickness of about 30 micrometers is directly cut without causing physical stress, chipping is reduced and the deflecting strength of each semiconductor chip is increased, resulting in improvement in semiconductor device yield and reliability. In addition, since high speed dicing at a rate of 300 mm/s or more can be done regardless of the semiconductor wafer thickness, throughput is improved.
This stealth dicing technology is referred to, for example, in Japanese Unexamined Patent Publication No. 2004-235626. Disclosed in paragraphs 0048 to 0053 and FIGS. 19 and 20 of the document is a laser dicing technique whereby the reverse side of a wafer is irradiated with a laser beam to create a modified layer for dicing. In this method, the front side of the wafer is held in a cooling bath or on a cooling chuck which uses a Peltier device, in order to prevent rise in the temperature of the wafer.
Furthermore, Japanese Unexamined Patent Publication No. 2005-57257 (paragraph 0087 and FIGS. 13 and 14), Japanese Unexamined Patent Publication No. 2005-47290 (paragraph 0040 and FIG. 16), and Japanese Unexamined Patent Publication No. 2004-1076 (paragraphs 0075 and 0076 and FIG. 23) disclose a technique whereby the reverse side of a wafer is irradiated with laser light focused on several points in the wafer thickness direction.
Moreover, Japanese Unexamined Patent Publication No. 2005-28438 (paragraph 0022 and FIG. 3) discloses a technique whereby plural modified layers are formed inside a wafer in its depth direction and a laser beam is split by a splitter to make laser irradiation with laser light focused on points of different depths at a time. Also, Japanese Unexamined Patent Publication No. 2003-173988 (paragraph 0011 and FIGS. 1 and 3) and Japanese Unexamined Patent Publication No. 2004-186635 (paragraph 0057 and FIG. 5) disclose a technique whereby, when the front side of a wafer is irradiated with a laser beam to melt the wafer for dicing, the laser beam passes through a water jet to guide the beam and cool cutting regions to prevent thermal deterioration.
Furthermore, Japanese Unexamined Patent Publication No. 2004-282037 (paragraphs 0035, 0036 and 0049 and FIG. 2) discloses a technique whereby after half-dicing the upper surface of a wafer, a laser beam is cast on the diced regions to fuse or evaporate cut streaks. In this laser irradiation process, the wafer is placed in a processing bath under water to prevent rise in the temperature of the wafer.
Also, Japanese Unexamined Patent Publication No. Hei 7 (1995)-256479 (paragraphs 0031 to 0034 and FIG. 1) discloses a dicing technique whereby a substrate is irradiated with a laser beam while it is placed in a processing bath under water, so that rise in the temperature of the substrate is prevented.
Furthermore, Japanese Unexamined Patent Publication No. 2004-25187 (paragraphs 0010 and 0011 and FIG. 1) discloses a technique whereby one side of a wafer is cooled by a Peltier device and the other side is irradiated with a laser beam for dicing.
Also, Japanese Unexamined Patent Publication No. Hei 9 (1997)-29472 (paragraphs 0027 to 0031 and FIGS. 1 and 2) discloses a technique whereby a splitting start point of a substrate is cooled by a Peltier device and a laser beam is irradiated from the other side to form an initial crack for splitting. In paragraphs 0022 to 0025 and FIG. 1 of the same document, a technique for improving the finish of the chip is disclosed whereby a wiring layer is formed to absorb the laser light in diced regions of a wafer with a low-k film formed thereon.
Furthermore, Japanese Unexamined Patent Publication No. 2003-320466 (paragraphs 0007 and 0008) discloses a technique whereby a low dielectric constant film on a silicon wafer is removed with a laser beam before the wafer is diced. Also, Japanese Unexamined Patent Publication No. 2003-151924 (paragraphs 0027 to 0029 and FIGS. 1 to 3) discloses a technique whereby while a slit is being made in one side of a wafer with a blade, at the same time a laser beam passed through the water reaches the other side of the wafer to dice the wafer.